An Interview with Josh Fisher | Inventing VLIW, Multiflow, Itanium, VLIW's Massive Success

TL;DR

Josh Fisher, inventor of VLIW, argues the architecture is a massive success with 12–15 billion units shipped annually in embedded systems, despite failing in general-purpose computing.

Key Points

• 1.VLIW's biggest misconception is that it's a failed technology. Fisher estimates 5 billion VLIW silicon units and 12–15 billion VLIW processors ship annually — roughly 45 times the volume of x86 chips — predominantly in embedded systems.
• 2.Fisher invented VLIW and trace scheduling at Yale University. Working at NYU's Courant Institute on horizontal microcode, he developed trace scheduling to automate compilation of wide instruction words, naming the architecture Very Long Instruction Word.
• 3.The Bulldog compiler, written as a PhD thesis by John Ellis, won the best computer science thesis award that year. It was a 'plastic' compiler that could generate code for any machine described to it, enabling the Multiflow venture.
• 4.Multiflow built machines dispatching 7, 14, or 28 operations simultaneously using TTL circuitry, not faster ECL. This was a deliberate engineering tradeoff — using ECL would have delayed market entry by years, as rival Cydrome's hot ECL machine demonstrated.
• 5.Multiflow failed due to financing collapse caused by the 'killer micro' revolution, not technical shortcomings. Chips like those in Sun and Apollo workstations signaled to investors that a full computer would soon fit on a single piece of silicon, making Multiflow's multi-board approach unfinanceable.
• 6.Key marketing mistakes included no presence in Germany or Japan, prices set too high, and no on-site tech support with early machines. Competitor Convex exploited these gaps, spreading FUD and selling at list price globally while discounting against Multiflow.
• 7.Fisher attended the first HP-Intel Itanium meeting and was publicly enthusiastic but privately skeptical. He felt the Itanium architecture violated VLIW design principles by being overly complex and difficult to compile for, having been handed a completed architecture manual on arrival at HP Labs.
• 8.Itanium failed for structural reasons beyond architecture flaws. By the late 1990s, the massive x86 installed base required recompilation or binary translation — a technology not yet mature — and Intel's internal priority for the project was questionable given persistent delays.
• 9.Fisher redirected his HP Labs Cambridge group into embedded computing, partnering with STMicroelectronics. This produced the ST241 chip family used in cable set-top boxes, cell base stations, and HP printers, representing a major commercial VLIW success.
• 10.Google's TPUs are VLIW processors used to train Gemini and other AI models. Fisher highlights that companies like Cadence/Tensilica and CEVA ship billions of VLIW processors annually into IoT, smartphones, storage, and automotive markets, where VLIW's low power, small silicon area, and predictable timing are decisive advantages.
• 11.VLIW's 'complexity pushed into the compiler' is a feature, not a flaw. Static scheduling gives embedded systems predictable timing and lower power versus superscalar architectures, and Fisher argues the four failed general-purpose VLIW attempts — Multiflow, Cydrome, Transmeta, and Itanium — should not define the technology's overall legacy.